Issued Patents All Time
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7480108 | Lens actuator and optical pickup | Seiichi Katou, Hidenao Saito, Akio Yabe | 2009-01-20 |
| 7477062 | LSI test socket for BGA | — | 2009-01-13 |
| 7355265 | Semiconductor integrated circuit | — | 2008-04-08 |
| 7172796 | Balloon catheter | Hiraku Murayama | 2007-02-06 |
| 7129728 | LSI test socket for BGA | — | 2006-10-31 |
| 6924562 | Semiconductor integrated circuit having at least one of a power supply plane and ground plane divided into parts insulated from one another | — | 2005-08-02 |
| 6741830 | Image forming apparatus | Kazutaka Sato, Shigeru Obata, Akitomo Kuwabara, Tetsuya Ooba | 2004-05-25 |
| 6701837 | Widthwise paper drift correction device for elongated web-like print paper | Tetsuya Ohba, Shigeru Obata | 2004-03-09 |
| 6606472 | Method and apparatus for forming color image | Akira Mori, Yukio Yamamoto, Kazumi Takahashi, Shogo Matsumoto, Junichi Matsuno +4 more | 2003-08-12 |
| 6553206 | Image forming apparatus | Kenji Asuwa, Kazutaka Sato, Shigeru Obata, Akitomo Kuwabara, Tetsuya Ooba | 2003-04-22 |
| 6531746 | Semiconductor device with high-speed switching circuit implemented by MIS transistors and process for fabrication thereof | — | 2003-03-11 |
| 6414372 | Bipolar transistor having lightly doped epitaxial collector region constant in dopant impurity and process of fabrication thereof | — | 2002-07-02 |
| 6365828 | Electromagnetic interference suppressing device and circuit | Hiroshi Wabuka, Shiro Yoshida, Hirokazu Tohya, Toru Mori, Atsushi Ochi | 2002-04-02 |
| 6300669 | Semiconductor integrated circuit device and method of designing same | — | 2001-10-09 |
| 6280434 | Angiographic catheter | Makoto Takamiya | 2001-08-28 |
| 6211029 | Process of fabricating a bipolar transistor having lightly doped epitaxial collector region constant in dopant impurity | — | 2001-04-03 |
| 6150227 | Integrated circuit structure with a gap between resistor film and substrate | — | 2000-11-21 |
| 6127733 | Check pattern for via-hole opening examination | — | 2000-10-03 |
| 6069641 | Ion flow recording apparatus and liquid developing method | Junichi Matsuno, Shogo Matsumoto, Taisaku Seino, Akira Mori, Keiji Kamio +4 more | 2000-05-30 |
| 6025219 | Method of manufacturing a semiconductor device having MOS transistor and bipolar transistor in mixture on the same substrate | — | 2000-02-15 |
| 5920107 | Semiconductor integrated circuit device with high integration density | — | 1999-07-06 |
| 5843828 | Method for fabricating a semiconductor device with bipolar transistor | — | 1998-12-01 |
| 5828930 | Electrostatic recording apparatus and its recording method | Shogo Matsumoto, Junichi Matsuno | 1998-10-27 |
| 5759883 | Method for making semiconductor device capable of independently forming MOS transistors and bipolar transistor | — | 1998-06-02 |
| 5677866 | Semiconductor memory device | — | 1997-10-14 |