Issued Patents All Time
Showing 1–25 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11962439 | Fast equalization for jitter mitigation | Georgios Takos, Bart Zeydel | 2024-04-16 |
| 11070297 | Constellation selection threshold adaptation for slicer | — | 2021-07-20 |
| 10938604 | Receiver supporting multiple data rates with fast equalization | Georgios Takos, Bart Zeydel | 2021-03-02 |
| 10608848 | CTLE adaptation based on post-cursors | — | 2020-03-31 |
| 10498565 | Sampling phase optimization for digital modulated signals | Georgios Takos, Bart Zeydel | 2019-12-03 |
| 10498579 | Dynamic constellation adaptation for slicer | — | 2019-12-03 |
| 10411918 | Receiver supporting multiple data rates | Bart Zeydel, Georgios Takos | 2019-09-10 |
| 10404496 | Mitigating interaction between adaptive equalization and timing recovery in multi-rate receiver | Georgios Takos, Bart Zeydel | 2019-09-03 |
| 10305504 | High frequency digital-to-analog conversion by interleaving without return-to-zero | Nanda Govind Jayaraman | 2019-05-28 |
| 10135606 | Mitigating interaction between adaptive equalization and timing recovery | Bart Zeydel | 2018-11-20 |
| 10050774 | Mitigating interaction between adaptive equalization and timing recovery | Bart Zeydel | 2018-08-14 |
| 9973203 | High frequency Digital-to-Analog conversion by interleaving without return-to-zero | Nanda Govind Jayamaran | 2018-05-15 |
| 9954547 | High frequency digital-to-analog conversion by time-interleaving without return-to-zero | Nanda Govind Jayaraman | 2018-04-24 |
| 9948427 | High speed add-compare-select for Viterbi decoder | Bart Zeydel | 2018-04-17 |
| 9882709 | Timing recovery with adaptive channel response estimation | Bart Zeydel | 2018-01-30 |
| 9882710 | Resolving interaction between channel estimation and timing recovery | Bart Zeydel | 2018-01-30 |
| 9496884 | DC offset calibration of ADC with alternate comparators | Nanda Govind Jayaraman | 2016-11-15 |
| 9397867 | Clock phase adaptation for precursor ISI reduction | Guy Fortier | 2016-07-19 |
| 9369135 | Method and apparatus for gapping | Michael Grosner, Timothy P. Walker | 2016-06-14 |
| 9281825 | Frequency synthesis with gapper and multi-modulus divider | Michael Grosner, Timothy P. Walker | 2016-03-08 |
| 9184971 | Apparatus for and method of robust packet detection and frequency offset estimation | Gregory Lerner, Nir Tal, Dan Wolberg, Manoneet Singh | 2015-11-10 |
| 9154345 | Device and method for reducing modulation profile memory size | Zvi Bernstein, Wee Peng Goh | 2015-10-06 |
| 9071521 | System and method for throughput enhancement | Zvi Bernstein | 2015-06-30 |
| 9065610 | Method and apparatus for smoothing jitter generated by byte stuffing | Timothy P. Walker | 2015-06-23 |
| 9008255 | Jitter mitigating phase locked loop circuit | Timothy P. Walker | 2015-04-14 |