SB

St éphane Breysse

TS Teledyne E2V Semiconductors Sas: 1 patents #17 of 43Top 40%
📍 Clavière, FR: #9 of 14 inventorsTop 65%
Overall (All Time): #2,462,364 of 4,157,543Top 60%
1
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Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
12425011 Method for determining the phase difference between a first clock signal received by a first electronic component and a second clock signal received by a second electronic component Simon Joret, Quentin Beraud-Sudreau, Rémi Laube, Matthieu Martin, Julien Cochard 2025-09-23