Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8468439 | Speed-optimized computation of cyclic redundancy check codes | — | 2013-06-18 |
| 7272528 | Reloadable word recognizer for logic analyzer | David A. Holaday, Gary Richmond | 2007-09-18 |
| 7227349 | Method and apparatus for the digital and analog triggering of a signal analysis device | — | 2007-06-05 |
| 6744833 | Data resynchronization between modules sharing a common clock | — | 2004-06-01 |
| 6041043 | SONET path/ATM physical layer transmit/receive processor | Claude Denton, Samuel J. Peters, II | 2000-03-21 |
| 5526286 | Oversampled logic analyzer | Tim E. Sauerwein, Craig Overhage | 1996-06-11 |
| 4752928 | Transaction analyzer | David Duane Chapman | 1988-06-21 |
| 4740891 | Asynchronous state machine | — | 1988-04-26 |