Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9899519 | Defect-Free SiGe source/drain formation by epitaxy-free process | Chih-Hao Wang, Ta-Wei Wang | 2018-02-20 |
| 8900980 | Defect-free SiGe source/drain formation by epitaxy-free process | Chih-Hao Wang, Ta-Wei Wang | 2014-12-02 |
| 7829978 | Closed loop CESL high performance CMOS device | Shang-Chih Chen, Chih-Hao Wang | 2010-11-09 |