Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11764211 | Device with a high efficiency voltage multiplier | Yu-Tso Lin, Chih-Hsien Chang, Min-Shueh Yuan, Robert Bogdan Staszewski | 2023-09-19 |
| 11177810 | All-digital phase locked loop using switched capacitor voltage doubler | Feng-Wei Kuo, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho, Robert Bogdan Staszewski | 2021-11-16 |
| 10862486 | All-digital phase locked loop using switched capacitor voltage doubler | Feng-Wei Kuo, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho, Robert Bogdan Staszewski | 2020-12-08 |
| 10756083 | Device with a high efficiency voltage multiplier | Yu-Tso Lin, Chih-Hsien Chang, Min-Shueh Yuan, Robert Bogdan Staszewski | 2020-08-25 |
| 10326454 | All-digital phase locked loop using switched capacitor voltage doubler | Feng-Wei Kuo, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho, Robert Bogdan Staszewski | 2019-06-18 |
| 10277117 | Device with a voltage multiplier | Yu-Tso Lin, Chih-Hsien Chang, Min-Shueh Yuan, Robert Bogdan Staszewski | 2019-04-30 |
| 10171089 | PVT-free calibration function using a doubler circuit for TDC resolution in ADPLL applications | Feng-Wei Kuo, Chewn-Pu Jou, Lan-Chou Cho, Huan-Neng Chen, Robert Bogdan Staszewski | 2019-01-01 |