Issued Patents All Time
Showing 26–50 of 81 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11555851 | Built-in self test circuit for measuring phase noise of a phase locked loop | Mao-Hsuan Chou, Ya-Tin Chang, Chih-Hsien Chang | 2023-01-17 |
| 11555842 | Apparatus, system and method for phase noise measurement | Mao-Hsuan Chou, Chih-Hsien Chang, Ya-Tin Chang | 2023-01-17 |
| 11545983 | Systems and methods for phase locked loop realignment with skew cancellation | Tsung-Hsien Tsai, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2023-01-03 |
| 11539355 | Systems and methods for generating a controllable-width pulse signal | Ming-Hsien Tsai, Chih-Hsien Chang, Tsung-Hsien Tsai | 2022-12-27 |
| 11539354 | Systems and methods for generating a controllable-width pulse signal | Ming-Hsien Tsai, Chih-Hsien Chang, Tsung-Hsien Tsai | 2022-12-27 |
| 11489530 | Delay lock loop circuits and methods for operating same | Tsung-Hsien Tsai, Ya-Tin Chang, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2022-11-01 |
| 11424751 | Programmable regulator voltage controlled ring oscillator | Tsung-Hsien Tsai, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2022-08-23 |
| 11374584 | Frequency divider circuit, and method for frequency divider circuit | Mao-Hsuan Chou, Chih-Hsien Chang | 2022-06-28 |
| 11356115 | Loop gain auto calibration using loop gain detector | Mao-Hsuan Chou, Ya-Tin Chang, Chih-Hsien Chang | 2022-06-07 |
| 11333708 | Built-in self test circuit for measuring phase noise of a phase locked loop | Mao-Hsuan Chou, Ya-Tin Chang, Chih-Hsien Chang | 2022-05-17 |
| 11290096 | System and method for adjusting cycle of a signal | Ming-Hsien Tsai, Tsung-Hsien Tsai | 2022-03-29 |
| 11281838 | Optimized layout cell | Tien-Chien Huang, Chuan-Yao Tan | 2022-03-22 |
| 11264979 | Circuit and method to enhance efficiency of semiconductor device | Mao-Ruei Li, Ming-Hsien Tsai | 2022-03-01 |
| 11228304 | Method and apparatus for precision phase skew generation | Mao-Hsuan Chou, Ya-Tin Chang, Chih-Hsien Chang | 2022-01-18 |
| 11228303 | Ring oscillator, controlling circuit and methods for realignment | Tsung-Hsien Tsai, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2022-01-18 |
| 11228279 | Oscillator circuits and methods for realignment of an oscillator circuit | Tsung-Hsien Tsai, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2022-01-18 |
| 11211936 | Delay lock loop circuits and methods for operating same | Tsung-Hsien Tsai, Ya-Tin Chang, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2021-12-28 |
| 11201625 | Phase locked loop | Ting-Kuei Kuan, Cheng-Hsiang Hsieh, Chen-Ting Ko, Chih-Hsien Chang | 2021-12-14 |
| 11031927 | Systems and methods for generating a controllable-width pulse signal | Ming-Hsien Tsai, Chih-Hsien Chang, Tsung-Hsien Tsai | 2021-06-08 |
| 10965293 | Voltage controlled delay line gain calibration | Ya-Tin Chang, Chih-Hsien Chang, Mao-Hsuan Chou | 2021-03-30 |
| 10958257 | System and method for adjusting duty cycle of a signal | Ming-Hsien Tsai, Tsung-Hsien Tsai | 2021-03-23 |
| 10928447 | Built-in self test circuit for measuring phase noise of a phase locked loop | Mao-Hsuan Chou, Ya-Tin Chang, Chih-Hsien Chang | 2021-02-23 |
| 10924125 | Frequency divider circuit, method and compensation circuit for frequency divider circuit | Mao-Hsuan Chou, Chih-Hsien Chang | 2021-02-16 |
| 10868496 | Oscillator circuits and methods for realignment of an oscillator circuit | Tsung-Hsien Tsai, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2020-12-15 |
| 10868546 | Fractional realignment techniques for PLLs | Tsung-Hsien Tsai, Chih-Hsien Chang, Cheng-Hsiang Hsieh | 2020-12-15 |