Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7492179 | Systems and methods for reducing testing times on integrated circuit dies | Chien-Jung Chiu, Tsung-Yu Lee | 2009-02-17 |
| 7403864 | Method and system for centrally-controlled semiconductor wafer correlation | Chung-Lin Hsieh, Tsung-Yu Lee, Yang Yen-Ni | 2008-07-22 |