Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9564510 | Method of fabricating a MOSFET with an undoped channel | Chih-Hsiung Lin, Jung-Ting Chen, Tai-Yuan Wang | 2017-02-07 |
| 9564332 | Mechanism for forming metal gate structure | Wen-Jia Hsieh, Chih-Lin Wang | 2017-02-07 |
| 9496367 | Mechanism for forming metal gate structure | Tien-Chun Wang, Yi-Chun Lo, Guo-Chiang Chi, Chia Ping Lo, Fu-Kai Yang +2 more | 2016-11-15 |
| 9478626 | Semiconductor device with an interconnect structure and method for forming the same | Guo-Chiang Chi, Chih-Hung Lu, Wei-Chin Chen | 2016-10-25 |
| 9331178 | Method for manufacturing non-planar field effect transistor having a semiconductor fin | Chien-Chih Lin, Long-Jie Hong, Chih-Lin Wang | 2016-05-03 |
| 9231098 | Mechanism for forming metal gate structure | Tien-Chun Wang, Yi-Chun Lo, Guo-Chiang Chi, Chia Ping Lo, Fu-Kai Yang +2 more | 2016-01-05 |
| 9136356 | Non-planar field effect transistor having a semiconductor fin and method for manufacturing | Chien-Chih Lin, Long-Jie Hong, Chih-Lin Wang | 2015-09-15 |
| 7714392 | Method for forming an improved low power SRAM contact | Yu-Ching Chang, Chien-Chih Chou, Yi-Tung Yen | 2010-05-11 |
| 7232762 | Method for forming an improved low power SRAM contact | Yu-Ching Chang, Chien-Chih Chou, Yi-Tung Yen | 2007-06-19 |
| 6774042 | Planarization method for deep sub micron shallow trench isolation process | Yi-Tung Yen | 2004-08-10 |
| 6143579 | Efficient method for monitoring gate oxide damage related to plasma etch chamber processing history | Chi-Hung Liao, Dean E. Lin, Sheng-Liang Pan | 2000-11-07 |