Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12322648 | Interlayer dielectric layer | Joung-Wei Liou, Yi-Wei Chiu | 2025-06-03 |
| 12266567 | Method of forming a barrier layer in an interconnect structure of semiconductor device | Yi-Wei Chiu, Hung Jui Chang | 2025-04-01 |
| 12206041 | Method for monolithic integration preparation of full-color nitride semiconductor micro light-emitting diode array | Xinqiang WANG, Fang Liu, Zhaoying Chen, Yucheng Guo, Bowen Sheng +1 more | 2025-01-21 |
| 12154608 | Magnetic tunnel junction device and method of forming same | Kuang-I Liu, Joung-Wei Liou, Jinn-Kwei Liang, Yi-Wei Chiu, Chin-Hsing Lin +4 more | 2024-11-26 |
| 12051766 | Method for preparing nitride light emitting diode (LED) and nondestructive interface separation | Xinqiang WANG, Fang Liu, Zhaoying Chen, Yucheng Guo, Bowen Sheng +1 more | 2024-07-30 |
| 11990167 | Magnetic tunnel junction device and method of forming same | Kuang-I Liu, Joung-Wei Liou, Jinn-Kwei Liang, Yi-Wei Chiu, Chin-Hsing Lin +4 more | 2024-05-21 |
| 11749563 | Interlayer dielectric layer | Joung-Wei Liou, Yi-Wei Chiu | 2023-09-05 |
| 11570082 | Accurately identifying execution time of performance test | Yao Dong Liu, Jing Xu, Lei Gao, Yan Liu | 2023-01-31 |
| 11567753 | Automated software patch mapping and recommendation | Lei Gao, Yan Liu, Zhen Liu, Kai Li, Jin Wang +1 more | 2023-01-31 |
| 11335593 | Interconnect structure of semiconductor device including barrier layer located entirely in via | Yi-Wei Chiu, Hung Jui Chang | 2022-05-17 |
| 11043251 | Magnetic tunnel junction device and method of forming same | Kuang-I Liu, Joung-Wei Liou, Jinn-Kwei Liang, Yi-Wei Chiu, Chin-Hsing Lin +4 more | 2021-06-22 |
| 10566232 | Post-etch treatment of an electrically conductive feature | Yi-Wei Chiu, Hung Jui Chang | 2020-02-18 |