YC

Yongseok Cheon

SY Synopsys: 3 patents #460 of 2,302Top 20%
📍 Portland, OR: #3,756 of 9,213 inventorsTop 45%
🗺 Oregon: #10,188 of 28,073 inventorsTop 40%
Overall (All Time): #1,576,239 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
7546567 Method and apparatus for generating a variation-tolerant clock-tree for an integrated circuit chip Pei-Hsin Ho 2009-06-09
7260802 Method and apparatus for partitioning an integrated circuit chip Pei-Hsin Ho 2007-08-21
7257782 Method and apparatus for reducing power consumption in an integrated circuit chip Pei-Hsin Ho, Qinke Wang 2007-08-14