VS

Vinay Kumar Surisetty

SY Synopsys: 1 patents #1,143 of 2,302Top 50%
Overall (All Time): #2,709,172 of 4,157,543Top 70%
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Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10915683 Methodology to create constraints and leverage formal coverage analyzer to achieve faster code coverage closure for an electronic structure Nivin Ninan George, Hari Pramoda Sri Sesha Arun Vedantham, Chaitanya Kamasani 2021-02-09