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Method for achieving uniform etch depth using ion implantation and a timed etch |
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DRAM cell utilizing a doubly gated vertical channel |
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Patterning a single integrated circuit layer using automatically-generated masks and multiple masking layers |
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Low-temperature formation of polycrystalline semiconductor films via enhanced metal-induced crystallization |
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Negative differential resistance pull up element for DRAM |
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2011-08-09 |
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Sequential selective epitaxial growth |
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Method and apparatus for capacitorless double-gate storage |
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Patterning a single integrated circuit layer using multiple masks and multiple masking layers |
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2009-02-24 |
