Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11443087 | System and method for power analysis for design logic circuit with irregular clock | Alexander John Wakefield, Jitendra Kumar Gupta, Vaibhav Jain, Rahul Jain | 2022-09-13 |