Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10417372 | Annotating isolated signals | Yaping Chen | 2019-09-17 |
| 8943452 | Hierarchical power map for low power design | I-Liang Lin, Wen-Chi Feng | 2015-01-27 |
| 8832615 | Method for detecting and debugging design errors in low power IC design | Ming-Han Hsieh, Ming-Hui Hsieh | 2014-09-09 |
| 8671383 | Viewing and debugging HDL designs having SystemVerilog interface constructs | I-Liang Ling, Qi Guo | 2014-03-11 |
| 8365132 | Hierarchial power map for low power design | I-Liang Lin, Wen-Chi Feng | 2013-01-29 |
| 8176453 | Power-aware debugging | Kai Yang, Tayung Liu, Furshing Tsai, Ting Shih Ang, Jun Zhao | 2012-05-08 |
| 7661732 | Switch assembly and foldable portable electronic device using same | Yong-Bo Tu | 2010-02-16 |
| 7135898 | Power-on reset circuit with supply voltage and temperature immunity, ultra-low DC leakage current, and fast power crash reaction | Chien-Chung Tseng | 2006-11-14 |
| 7042205 | Reference voltage generator with supply voltage and temperature immunity | Chien-Chung Tseng | 2006-05-09 |