Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7737472 | Semiconductor integrated circuit device | Hideaki Kondo, Masaki Tamaru, Takashi Andoh | 2010-06-15 |
| 7597318 | Sheet material accumulating apparatus | Kenji Mishima, Haruhiro Otsuka, Hitoshi Katsuragawa | 2009-10-06 |
| 7503026 | Cell, standard cell, standard cell library, a placement method using standard cell, and a semiconductor integrated circuit | Miwa Ichiryu, Tetsurou Toubou | 2009-03-10 |
| 7369618 | Signal transmission circuit | Keiichi Kusumoto, Tsuguyasu Hatsuda, Tetsurou Toubou | 2008-05-06 |
| 6967866 | Semiconductor memory and semiconductor integrated circuit | Akio Hirata, Tetsurou Toubou, Nana Okamoto, Mitsuaki Hayashi | 2005-11-22 |
| 6922443 | Signal transmission circuit | Keiichi Kusumoto, Tsuguyasu Hatsuda, Tetsurou Toubou | 2005-07-26 |
| 6895564 | Method for designing LSI system | Mikawa Takahashi, Hiroshi Mizuno, Hiroki Shinde | 2005-05-17 |
| 6490715 | Cell library database and design aiding system | Shiro Sakiyama, Hiroo Yamamoto, Jun Kajiwara, Masayoshi Kinoshita | 2002-12-03 |
| 6301692 | Method for designing layout of semiconductor integrated circuit, semiconductor integrated circuit obtained by the same method, and method for verifying timing thereof | Shinichi Kumashiro, Hiroshi Mizuno, Yasuhiro Tanaka, Youichirou Mae | 2001-10-09 |
| 5983008 | Method for designing layout of semiconductor integrated circuit, semiconductor integrated circuit obtained by the same method, and method for verifying timing thereof | Shinichi Kumashiro, Hiroshi Mizuno, Yasuhiro Tanaka, Youichirou Mae | 1999-11-09 |
| 5923569 | Method for designing layout of semiconductor integrated circuit semiconductor integrated circuit obtained by the same method and method for verifying timing thereof | Shinichi Kumashiro, Hiroshi Mizuno, Yasuhiro Tanaka, Youichirou Mae | 1999-07-13 |