Issued Patents All Time
Showing 51–75 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6542038 | PLL circuit having a phase offset detecting phase comparator | Kazuko Nishimura | 2003-04-01 |
| 6473873 | Semiconductor memory device | Hironori Akamatsu | 2002-10-29 |
| 6426985 | Variable delay circuit and phase adjustment circuit | Hiroyuki Yamauchi | 2002-07-30 |
| 6400637 | Semiconductor memory device | Hironori Akamatsu, Makoto Kojima | 2002-06-04 |
| 6393577 | Semiconductor integrated circuit system, semiconductor integrated circuit and method for driving semiconductor integrated circuit system | Hironori Akamatsu | 2002-05-21 |
| 6323756 | Data transmitter | Takefumi Yoshikawa, Hiroyuki Yamauchi | 2001-11-27 |
| 6246627 | Semiconductor device capable of cutting off a leakage current in a defective array section and method thereof | Hiroyuki Yamauchi, Hironori Akamatsu, Keiichi Kusumoto, Satoshi Takahashi, Yutaka Terada +1 more | 2001-06-12 |
| 6226583 | Control device for continuously variable transmission | — | 2001-05-01 |
| 6208567 | Semiconductor device capable of cutting off a leakage current in a defective array section | Hiroyuki Yamauchi, Hironori Akamatsu, Keiichi Kusumoto, Satoshi Takahashi, Yutaka Terada +1 more | 2001-03-27 |
| 6201412 | Semiconductor integrated circuit with driver stabilization using parasitic capacitance | Hironori Akamatsu, Takashi Hirata | 2001-03-13 |
| 6199005 | Vehicle drive force control device | — | 2001-03-06 |
| 6198415 | Serial-to-parallel converter | Takefumi Yoshikawa | 2001-03-06 |
| 6191632 | Clock generation circuit and semiconductor integrated circuit | Hironori Akamatsu | 2001-02-20 |
| 6145065 | Memory access buffer and reordering apparatus using priorities | Satoshi Takahashi, Hiroyuki Yamauchi, Hironori Akamatsu, Keiichi Kusumoto, Yutaka Terada +1 more | 2000-11-07 |
| 6140864 | Circuit for controlling leakage current in large scale integrated circuits | Takashi Hirata, Hironori Akamatsu | 2000-10-31 |
| 6137306 | Input buffer having adjustment function for suppressing skew | Takashi Hirata | 2000-10-24 |
| 6118309 | Semiconductor circuit | Hironori Akamatsu | 2000-09-12 |
| 6107863 | Charge pump circuit and logic circuit | — | 2000-08-22 |
| 6101441 | Drive force controller for a vehicle | — | 2000-08-08 |
| 6079511 | Vehicle drive force control device | — | 2000-06-27 |
| 6073245 | Skewing-suppressive output buffer circuit | Takashi Hirata | 2000-06-06 |
| 6009024 | Semiconductor memory | Takashi Hirata, Hiroyuki Yamauchi, Hironori Akamatsu, Keiichi Kusumoto, Satoshi Takahashi +1 more | 1999-12-28 |
| 5999022 | Signal transmission driver circuit, receiver circuit, and method thereof for transmitting and receiving information based on multiple periods and/or a delay function | Hironori Akamatsu, Hisakazu Kotani, Hiroyuki Yamauchi, Akira Matsuzawa, Shoichiro Tada | 1999-12-07 |
| 5970018 | Semiconductor integrated circuit and decode circuit for memory | Hironori Akamatsu | 1999-10-19 |
| 5933050 | Semiconductor circuit | Hironori Akamatsu | 1999-08-03 |