Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7319604 | Electronic memory device having high density non-volatile memory cells and a reduced capacitive interference cell-to-cell | Osama Khouri, Carlo Caimi, Giovanni Mastrodomenico | 2008-01-15 |
| 7115472 | Process for manufacturing a dual charge storage location memory cell | Claudio Brambilla, Manlio Sergio Cereda | 2006-10-03 |
| 7091570 | MOS device and a process for manufacturing MOS devices using a dual-polysilicon layer technology with side contact | Carlo Caimi, Valentina Contin, Davide Merlani | 2006-08-15 |
| 7023047 | MOS device and process for manufacturing MOS devices using dual-polysilicon layer technology | Valentina Tessa Contin, Carlo Caimi, Davide Merlani | 2006-04-04 |
| 6825523 | Process for manufacturing a dual charge storage location memory cell | Claudio Brambilla, Manlio Sergio Cereda | 2004-11-30 |
| 6700226 | Multi-emitter bipolar transistor for bandgap reference circuits | Loris Vendrame, Giorgio Oddone, Antonio Barcella | 2004-03-02 |
| 6365456 | Process for manufacturing semiconductor integrated memory devices with cells matrix having virtual ground | Manlio Sergio Cereda, Claudio Brambilla | 2002-04-02 |
| 6350671 | Method for autoaligning overlapped lines of a conductive material in integrated electronic circuits | Claudio Brambilla, Manlio Sergio Cereda | 2002-02-26 |
| 6326266 | Method of manufacturing an EPROM memory device having memory cells organized in a tablecloth matrix | Claudio Brambilla, Valerio Cassio, Manlio Sergio Creda | 2001-12-04 |
| 6300195 | Process for manufacturing semiconductor integrated memory devices with cells matrix having virtual ground | Pierantonio Pozzoni, Claudio Brambilla, Sergio Cereda, Rustom Irani | 2001-10-09 |
| 6251736 | Method for forming contactless MOS transistors and resulting devices, especially for use in non-volatile memory arrays | Claudio Brambilla, Sergio Cereda | 2001-06-26 |
| 6124169 | Contact structure and associated process for production of semiconductor electronic devices and in particular nonvolatile EPROM and flash EPROM memories | Emilio Camerlenghi, Gabriella Fontana | 2000-09-26 |
| 6063663 | Method for manufacturing a native MOS P-channel transistor with a process for manufacturing non-volatile memories | Claudio Brambilla, Manlio Sergio Cereda, Valerio Cassio | 2000-05-16 |
| 5440510 | Integrated circuit entirely protected against ultraviolet rays | Emilio Camerlenghi | 1995-08-08 |