Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8039898 | Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device | Domenico Murabito, Ferruccio Frisina | 2011-10-18 |
| 8012832 | Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device | Ferruccio Frisina, Simone RASCUNÁ | 2011-09-06 |
| 7892923 | Power field effect transistor and manufacturing method thereof | Ferruccio Frisina | 2011-02-22 |
| 7871880 | Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices | Ferruccio Frisina | 2011-01-18 |
| 7838927 | Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device | Ferruccio Frisina, Simone RASCUNÁ | 2010-11-23 |
| 7790520 | Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device | Domenico Murabito, Ferruccio Frisina | 2010-09-07 |
| 7713853 | Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices | Ferrucio Frisina, Angelo Magri | 2010-05-11 |
| 7700970 | Integrated power device having a start-up structure | Antonino Longo Minnolo, Rosalia Germana' | 2010-04-20 |
| 7071062 | Integrated device with Schottky diode and MOS transistor and related manufacturing process | Ferruccio Frisina | 2006-07-04 |
| 6841836 | Integrated device with Schottky diode and MOS transistor and related manufacturing process | Ferruccio Frisina | 2005-01-11 |
| 6762112 | Method for manufacturing isolating structures | Vito Raineri | 2004-07-13 |
| 6709955 | Method of fabricating electronic devices integrated in semiconductor substrates provided with gettering sites, and a device fabricated by the method | Vito Raineri, Umberto Stagnitti, Sebastiano Mugavero | 2004-03-23 |
| 6451672 | Method for manufacturing electronic devices in semiconductor substrates provided with gettering sites | Davide Caruso, Vito Raineri, Umberto Stagnitti | 2002-09-17 |