Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 10181855 | Integrated circuit comprising adjustable back biasing of one or more logic circuit regions | Dan Raun Jensen, Per Asbeck | 2019-01-15 | |
| 9461641 | Method and device for management of an electrical power-up of a sector of an electronic circuit | Severin Trochut, Emilie Rigal, Fabrice Blisson, Nicolas Seller | 2016-10-04 | $1,721,000 |
| 9147695 | Device with FD-SOI cell and insulated semiconductor contact region and related methods | Eric Remond | 2015-09-29 | $2,781,000 |
| 9013228 | Method for providing a system on chip with power and body bias voltages | — | 2015-04-21 | $1,687,000 |
| 6791340 | Device for the comparison of two resistors, and integrated resistor compensation system incorporating this device | — | 2004-09-14 | $14,277,000 |