Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12306246 | Partial chain reconfiguration for test time reduction | Sandeep Jain | 2025-05-20 |
| 12265121 | Compression-based scan test system | Sandeep Jain, Prateek Singh | 2025-04-01 |
| 12203985 | Test-time optimization with few slow scan pads | Sandeep Jain, Pooja Jain | 2025-01-21 |
| 12105145 | Scan compression through pin data encoding | Sandeep Jain | 2024-10-01 |
| 11782092 | Scan compression through pin data encoding | Sandeep Jain | 2023-10-10 |
| 7167404 | Method and device for testing configuration memory cells in programmable logic devices (PLDS) | Parvesh Swami | 2007-01-23 |