Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10690721 | Adaptive glitch detector for system on a chip | — | 2020-06-23 |
| 10530348 | Shift register utilizing latches controlled by dual non-overlapping clocks | Yi Ren Chin | 2020-01-07 |
| 10418982 | Folded divider architecture | — | 2019-09-17 |
| 10243545 | Shift register utilizing latches controlled by dual non-overlapping clocks | Yi Ren Chin | 2019-03-26 |
| 10104146 | DPCM data compression using compressed data tags | — | 2018-10-16 |
| 10079593 | Folded divider architecture | — | 2018-09-18 |
| 9847778 | Folded divider architecture | — | 2017-12-19 |
| 9311977 | Event controlled decoding circuit | — | 2016-04-12 |
| 8928381 | Spare cell strategy using flip-flop cells | — | 2015-01-06 |
| 8680892 | Reset pulse encoding and decoding scheme with no internal clock | Yann Desprez-Le-Goarant | 2014-03-25 |
| 8416906 | Clock resynchronization circuit and method | — | 2013-04-09 |
| 8310285 | Process, temperature, part and setting independent reset pulse encoding and decoding scheme | — | 2012-11-13 |
| 8299817 | Circuit and method for adding dither to vertical droop compensation using linear feedback shift registers | Srijith Varma Vijaya Varma | 2012-10-30 |