Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7873928 | Hierarchical analog IC placement subject to symmetry, matching and proximity constraints | Po-Hung Lin, Wei-Chung Chao | 2011-01-18 |
| 7739646 | Analog and mixed signal IC layout system | Po-Hung Lin, Ho Che Yu, Tian-Hau Tsai, Shi-Hong Bai | 2010-06-15 |
| 7707536 | V-shaped multilevel full-chip gridless routing | Tai-Chen Chen, Yao-Wen Chang, Feng-Yuan Chang | 2010-04-27 |
| 7603640 | Multilevel IC floorplanner | Tung-Chieh Chen, Yao-Wen Chang | 2009-10-13 |
| 7386823 | Rule-based schematic diagram generator | Tian-Hau Tsai, Po-Hung Lin, Ho Che Yu | 2008-06-10 |
| 7178123 | Schematic diagram generation and display system | Po-Hung Lin | 2007-02-13 |
| 6980211 | Automatic schematic diagram generation using topology information | Chia-Huei Lee, Yu-Sheng Lu, Bang-Hwa Ho | 2005-12-27 |