Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9081518 | Information processor and control method of the same | — | 2015-07-14 |
| 8874978 | Information processing apparatus, information processing system, controlling method for information processing apparatus and program | — | 2014-10-28 |
| 8648650 | Integrated circuit with dynamic power supply control | — | 2014-02-11 |
| 8570086 | Delay latch circuit and delay flip-flop | — | 2013-10-29 |
| 7926023 | Methods and apparatus for handling processing errors in a multi-processing system | Yasukichi Okawa, Daisuke Hiraoka, Tatsuya Koyama | 2011-04-12 |
| 7904499 | Methods and apparatus for carry generation in a binary look ahead system | — | 2011-03-08 |
| 7840629 | Methods and apparatus for providing a booth multiplier | — | 2010-11-23 |
| 7730456 | Methods and apparatus for handling processing errors in a multi-processing system | Yasukichi Okawa, Daisuke Hiraoka, Tatsuya Koyama | 2010-06-01 |
| 7720902 | Methods and apparatus for providing a reduction array | — | 2010-05-18 |
| 6625633 | Divider and method with high radix | — | 2003-09-23 |
| 6496041 | Logic cell and logic circuit using the same | — | 2002-12-17 |
| 6480942 | Synchronized FIFO memory circuit | — | 2002-11-12 |
| 6414529 | Latch and D-type flip-flop | — | 2002-07-02 |
| 6374393 | Logic circuit evaluation using sensing latch logic | — | 2002-04-16 |
| 6232800 | Differential sense amplifier circuit and dynamic logic circuit using the same | — | 2001-05-15 |
| 6028987 | Method of operation of arithmetic and logic unit, storage medium, and arithmetic and logic unit | — | 2000-02-22 |