Issued Patents All Time
Showing 51–75 of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6808990 | Random access memory cell and method for fabricating same | Tsiu C. Chan | 2004-10-26 |
| 6801467 | DRAM cell refreshment method and circuit | Florent Vautrin | 2004-10-05 |
| 6798681 | DRAM | Pascale Mazoyer, Pierre C. Fazan | 2004-09-28 |
| 6765405 | Protection circuit against voltage or current spikes, and clock circuit using a protection circuit of this kind | Jean-Francois Hugues, Philippe Roche | 2004-07-20 |
| 6583459 | Random access memory cell and method for fabricating same | Tsiu C. Chan | 2003-06-24 |
| 6563749 | Dynamic memory circuit including spare cells | — | 2003-05-13 |
| 6556092 | Low consumption oscillator | — | 2003-04-29 |
| 6538942 | Process for controlling a read access for a dynamic random access memory and corresponding memory | — | 2003-03-25 |
| 6535987 | Amplifier with a fan-out variable in time | — | 2003-03-18 |
| 6489810 | Highly reliable programmable monostable | — | 2002-12-03 |
| 6477673 | Structure and method with which to generate data background patterns for testing random-access-memories | Robert Wadsworth | 2002-11-05 |
| 6455884 | Radiation hardened semiconductor memory with active isolation regions | Tsiu C. Chan, Antonio Imbruglia | 2002-09-24 |
| 6452841 | Dynamic random access memory device and corresponding reading process | — | 2002-09-17 |
| 6421799 | Redundancy correction ROM | — | 2002-07-16 |
| 6373741 | Memory circuit architecture | — | 2002-04-16 |
| 6360294 | Device and method for simultaneously reading/rewriting a dynamic random-access memory cell using a plurality of amplifiers and isolation circuitry | Michel Bouche | 2002-03-19 |
| 6316986 | Method and device for voltage multiplication | Francois Jacquet | 2001-11-13 |
| 6215706 | Fast structure dram | Michel Harrand | 2001-04-10 |
| 6208551 | Memory circuit architecture | Herve Jaouen | 2001-03-27 |
| 6205077 | One-time programmable logic cell | — | 2001-03-20 |
| 6091650 | Redundancy for low remanence memory cells | — | 2000-07-18 |
| 6018486 | Reading method and circuit for dynamic memory | — | 2000-01-25 |
| 6005818 | Dynamic random access memory device with a latching mechanism that permits hidden refresh operations | — | 1999-12-21 |
| 5982679 | Memory circuit with dynamic redundancy | — | 1999-11-09 |
| 5973985 | Dual port SRAM cell having pseudo ground line or pseudo power line | — | 1999-10-26 |