Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12230313 | Vertical memory device | Seung Hwan Kim, Su Ock Chung | 2025-02-18 |
| 12131774 | Vertical memory device with a double word line structure | Seung Hwan Kim, Su Ock Chung | 2024-10-29 |
| 11887654 | Vertical memory device | Seung Hwan Kim, Su Ock Chung | 2024-01-30 |
| 11832434 | Memory cell and memory device | Seung Hwan Kim, Dong Sun Sheen, Su Ock Chung, Il Sup JIN | 2023-11-28 |
| 11501827 | Vertical memory device with a double word line structure | Seung Hwan Kim, Su Ock Chung | 2022-11-15 |
| 11355177 | Vertical memory device | Seung Hwan Kim, Su Ock Chung | 2022-06-07 |
| 8198161 | Vertical transistor and method for forming the same | — | 2012-06-12 |
| 8053817 | Vertical transistor and method for forming the same | — | 2011-11-08 |
| 7799641 | Method for forming a semiconductor device having recess channel | Jin Yul Lee, Min Ho Ha | 2010-09-21 |
| 7095069 | Magnetoresistive random access memory, and manufacturing method thereof | — | 2006-08-22 |
| 7019370 | Method for manufacturing magnetic random access memory | — | 2006-03-28 |
| 6885578 | NAND-type magnetoresistive RAM | — | 2005-04-26 |
| 6855564 | Magnetic random access memory having transistor of vertical structure with writing line formed on an upper portion of the magnetic tunnel junction cell | — | 2005-02-15 |
| 6649953 | Magnetic random access memory having a transistor of vertical structure with writing line formed on an upper portion of the magnetic tunnel junction cell | — | 2003-11-18 |
| 6503795 | Method for fabricating a semiconductor device having a storage cell | — | 2003-01-07 |