Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11615822 | Electronic device and electronic system related to performance of a termination operation | Min Su Park, Seung Wook Oh | 2023-03-28 |
| 11170829 | Semiconductor device performing duty ratio adjustment operation | Min Sik HAN, Sung Chun Jang | 2021-11-09 |
| 11146275 | Signal generation circuit and a semiconductor apparatus using the signal generation circuit | Gyu-tae Park | 2021-10-12 |
| 10891995 | Command generation method and semiconductor device related to the command generation method | Geun Ho Choi, Seung Wook Oh | 2021-01-12 |
| 10886927 | Signal generation circuit synchronized with a clock signal and a semiconductor apparatus using the same | Seung Wook Oh | 2021-01-05 |
| 10636462 | Semiconductor devices | Geun Ho Choi, Seung Wook Oh | 2020-04-28 |
| 9691460 | Memory device based on domain wall memory and reading and writing method thereof, and apparatus for digital signal processing using the same | Jongsun Park | 2017-06-27 |
| 8908778 | Rail-to-rail comparator, pulse amplitude modulation receiver, and communication system using the same | Jun-Hyun Chun, Jin-wook Burm, Dae Ho Yun | 2014-12-09 |
| 8749281 | Phase detection circuit and synchronization circuit using the same | Young Suk Seo | 2014-06-10 |
| 8638137 | Delay locked loop | — | 2014-01-28 |
| 8598927 | Internal clock generator and operating method thereof | — | 2013-12-03 |
| 8508272 | Data output circuit and data output method thereof | — | 2013-08-13 |
| 8225150 | Semiconductor memory device | Hwang Hur, Chang-Ho Do, Jae-Bum Ko | 2012-07-17 |
| 8050122 | Fuse apparatus for controlling built-in self stress and control method thereof | — | 2011-11-01 |
| 8040169 | Delay locked loop circuit | Hoon Choi | 2011-10-18 |
| 8031552 | Multi-port memory device with serial input/output interface | Jae Il Kim, Chang-Ho Do, Hwang Hur | 2011-10-04 |
| 7979758 | Semiconductor memory device | Hwang Hur, Chang-Ho Do, Jae-Bum Ko | 2011-07-12 |
| 7952406 | Delay locked loop circuit | — | 2011-05-31 |
| 7872511 | Circuit and method for initializing an internal logic unit in a semiconductor memory device | Chang-Ho Do | 2011-01-18 |
| 7830187 | Delay locked loop circuit | Hoon Choi | 2010-11-09 |
| 7800963 | Semiconductor memory device operating with prefetch scheme | Kyung-Whan Kim | 2010-09-21 |
| 7773439 | Test operation of multi-port memory device | Chang-Ho Do | 2010-08-10 |
| 7701800 | Multi-port memory device with serial input/output interface | Jae Il Kim, Chang-Ho Do, Hwang Hur | 2010-04-20 |
| 7660168 | Read operation of multi-port memory device | Jae Il Kim, Chang-Ho Do, Jae-Hyuk Im | 2010-02-09 |
| 7613065 | Multi-port memory device | — | 2009-11-03 |