Issued Patents All Time
Showing 51–75 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11025283 | Decoding latency and throughput of a multi-decoder error correction system | Xuanxuan Lu, Fan Zhang, Shiangjyh Steve Chang | 2021-06-01 |
| 11005503 | Memory system with hybrid decoding scheme and method of operating such memory system | Naveen Kumar, Abhiram Prabhakar, Chenrong Xiong, Fan Zhang | 2021-05-11 |
| 10997017 | Neighbor assisted correction error recovery for memory system and method thereof | Yu Cai, Chenrong Xiong, Fan Zhang, Naveen Kumar, Xuanxuan Lu | 2021-05-04 |
| 10970165 | Encoder and decoder for memory system and method thereof | Yu Cai, Naveen Kumar, Xuanxuan Lu, Chenrong Xiong, Fan Zhang | 2021-04-06 |
| 10963337 | Memory system with super chip-kill recovery and method of operating such memory system | Naveen Kumar, Yu Cai, Chenrong Xiong, Fan Zhang | 2021-03-30 |
| 10956263 | Memory system with deep learning based interference correction capability and method of operating such memory system | Naveen Kumar, Yu Cai, Fan Zhang | 2021-03-23 |
| 10949113 | Retention aware block mapping in flash-based solid state drives | Yu Cai, Naveen Kumar, Fan Zhang | 2021-03-16 |
| 10938419 | Encoding method and system for memory device including QLC cells | Naveen Kumar, Fan Zhang | 2021-03-02 |
| 10901656 | Memory system with soft-read suspend scheme and method of operating such memory system | Yu Cai, Naveen Kumar, Fan Zhang, Chenrong Xiong, Xuanxuan Lu | 2021-01-26 |
| 10896125 | Garbage collection methods and memory systems for hybrid address mapping | Naveen Kumar, Yu Cai, Fan Zhang | 2021-01-19 |
| 10884947 | Methods and memory systems for address mapping | Fan Zhang, Naveen Kumar, Yu Cai | 2021-01-05 |
| 10884858 | LDPC decoding device, memory system including the same and method thereof | Naveen Kumar, Chenrong Xiong, Abhiram Prabhakar, Fan Zhang | 2021-01-05 |
| 10877840 | Dynamic neighbor and bitline assisted correction for NAND flash storage | Naveen Kumar, Yu Cai, Fan Zhang | 2020-12-29 |
| 10847231 | Memory system with adaptive read-threshold scheme and method of operating such memory system | Chenrong Xiong, Fan Zhang, Naveen Kumar, Yu Cai | 2020-11-24 |
| 10846172 | Encoding method and system for memory device including QLC cells | Naveen Kumar, Fan Zhang | 2020-11-24 |
| 10817373 | Soft chip-kill recovery using concatenated codes | Naveen Kumar, Fan Zhang | 2020-10-27 |
| 10714195 | Read disturb detection and recovery with adaptive thresholding for 3-D NAND storage | Naveen Kumar, Fan Zhang, Chenrong Xiong, Yu Cai | 2020-07-14 |
| 10707899 | Bit-flipping decoder for G-LDPC codes with syndrome-decoding for component codes | Naveen Kumar, Chenrong Xiong, Fan Zhang, Xuanxuan Lu, Yu Cai | 2020-07-07 |
| 10700706 | Memory system with decoders and method of operating such memory system and decoders | Fan Zhang, Chenrong Xiong, Naveen Kumar, Yu Cai | 2020-06-30 |
| 10691540 | Soft chip-kill recovery for multiple wordlines failure | Naveen Kumar, Chenrong Xiong, Yu Cai, Fan Zhang | 2020-06-23 |
| 10693496 | Memory system with LDPC decoder and method of operating such memory system and LDPC decoder | Naveen Kumar, Chenrong Xiong, Yu Cai, Fan Zhang | 2020-06-23 |
| 10691536 | Method to select flash memory blocks for refresh after read operations | Fan Zhang, Chenrong Xiong, Naveen Kumar, Yu Cai | 2020-06-23 |
| 10680647 | Min-sum decoding for LDPC codes | Naveen Kumar, Abhiram Prabhakar, Chenrong Xiong, Fan Zhang | 2020-06-09 |
| 10672497 | Memory system and method for bad block management | Yu Cai, Fan Zhang, Naveen Kumar, Chenrong Xiong, Xuanxuan Lu | 2020-06-02 |
| 10601546 | Dynamic interleaver change for bit line failures in NAND flash storage | Naveen Kumar, Yu Cai, Chenrong Xiong, Fan Zhang, Xuanxuan Lu | 2020-03-24 |