Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9640263 | Non-volatile memory systems and methods | Hieu Van Tran | 2017-05-02 |
| 8614924 | Non-volatile memory systems and methods | Hieu Van Tran | 2013-12-24 |
| 8432750 | Non-volatile memory systems and methods including page read and/or configuration features | Hieu Van Tran | 2013-04-30 |
| 7848159 | Non-volatile memory systems and methods including page read and/or configuration features | Hieu Van Tran | 2010-12-07 |
| 7471581 | Wide dynamic range and high speed voltage mode sensing for a multilevel digital non-volatile memory | Hieu Van Tran | 2008-12-30 |
| 7196927 | Wide dynamic range and high speed voltage mode sensing for a multilevel digital non-volatile memory | Hieu Van Tran | 2007-03-27 |
| 7061295 | Ring oscillator for digital multilevel non-volatile memory | William Saiki, Hieu Van Tran | 2006-06-13 |
| 7038538 | Folded cascode high voltage operational amplifier with class AB source follower output stage | Hieu Van Tran, William Saiki | 2006-05-02 |
| 7035151 | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system | Hieu Van Tran, George J. Korsh | 2006-04-25 |
| 6992937 | Column redundancy for digital multilevel nonvolatile memory | Hieu Van Tran, William Saiki, George J. Korsh | 2006-01-31 |
| 6967524 | High voltage generation and regulation system for digital multilevel nonvolatile memory | William Saiki, Hieu Van Tran | 2005-11-22 |
| 6867638 | High voltage generation and regulation system for digital multilevel nonvolatile memory | William Saiki, Hieu Van Tran | 2005-03-15 |
| 6865099 | Wide dynamic range and high speed voltage mode sensing for a multilevel digital non-volatile memory | Hieu Van Tran | 2005-03-08 |
| 6751118 | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system | Hieu Van Tran, George J. Korsh | 2004-06-15 |
| 6590825 | Non-volatile flash fuse element | Hieu Van Tran, William Saiki, George J. Korsh | 2003-07-08 |
| 6590453 | Folded cascode high voltage operational amplifier with class AB source follower output stage | Hieu Van Tran, William Saiki | 2003-07-08 |
| 6519180 | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system | Hieu Van Tran, George J. Korsh | 2003-02-11 |
| 6504754 | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system | Hieu Van Tran, George J. Korsh | 2003-01-07 |
| 6487116 | Precision programming of nonvolatile memory cells | George J. Korsh | 2002-11-26 |
| 6462986 | Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell | — | 2002-10-08 |
| 6396742 | Testing of multilevel semiconductor memory | George J. Korsh, Hieu Van Tran | 2002-05-28 |
| 6285598 | Precision programming of nonvolatile memory cells | George J. Korsh | 2001-09-04 |
| 6282145 | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system | Hieu Van Tran, George J. Korsh | 2001-08-28 |
| 6038174 | Precision programming of nonvolatile memory cells | George J. Korsh | 2000-03-14 |
| 5905673 | Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell | — | 1999-05-18 |