Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12101658 | Communication processor handling communications protocols on separate threads | Partha Sarathy Murali, Venkat Mattela, Venkata Siva Prasad Pulagam | 2024-09-24 |
| 12045645 | Multi-thread wireless communications processor with granular thread processes | Partha Sarathy Murali, Venkat Mattela, Venkata Siva Prasad Pulagam | 2024-07-23 |
| 12034551 | Ultra low power mesh network | Partha Sarathy Murali, Ajay Mantha, Nagaraj Reddy Anakala, Venkat Mattela | 2024-07-09 |
| 11893249 | System and method for flash and RAM allocation for reduced power consumption in a processor | Partha Sarathy Murali, Venkata Siva Prasad Pulagam, Anusha Biyyani, Venkatesh Vinjamuri, Shahabuddin Mohammed +2 more | 2024-02-06 |
| 11775306 | Multi-threaded processor with thread granularity | Partha Sarathy Murali, Venkat Mattela, Venkata Siva Prasad Pulagam | 2023-10-03 |
| 11755096 | Method and apparatus for selectable high performance or low power processor system | Partha Sarathy Murali, Suryanarayana Varma Nallaparaju, Kriyangbhai Vinodbhai Shah, Venkata Rao Gunturu, Mani Kumar Kothamasu | 2023-09-12 |
| 11665008 | Ultra-low power mesh network | Partha Sarathy Murali, Ajay Mantha, Nagaraj Reddy Anakala, Venkat Mattela | 2023-05-30 |
| 11640196 | Unit element for performing multiply-accumulate operations | Venkat Mattela, Aravinth Kumar Ayyappannair Radhadevi, Sesha Sairam Regulagadda | 2023-05-02 |
| 11537190 | Dual processor system for reduced power application processing | Partha Sarathy Murali, Venkat Mattela | 2022-12-27 |
| 11307779 | System and method for flash and RAM allocation for reduced power consumption in a processor | Partha Sarathy Murali, Venkata Siva Prasad Pulagam, Anusha Biyyani, Venkatesh Vinjamuri, Shahabuddin Mohammed +2 more | 2022-04-19 |
| 11310063 | Ultra-low power mesh network | Partha Sarathy Murali, Ajay Mantha, Nagaraj Reddy Anakala, Venkat Mattela | 2022-04-19 |
| 11288072 | Multi-threaded processor with thread granularity | Partha Sarathy Murali, Venkat Mattela, Venkata Siva Prasad Pulagam | 2022-03-29 |
| 11112847 | Dual processor power saving architecture communications system | Partha Sarathy Murali, Venkat Mattela | 2021-09-07 |
| 11112849 | Method and apparatus for selectable high performance or low power processor system | Partha Sarathy Murali, Suryanarayana Varma Nallaparaju, Kriyangbhai Vinodbhai Shah, Venkata Rao Gunturu, Mani Kumar Kothamasu | 2021-09-07 |
| 11106268 | Method and system for saving power in a real time hardware processing unit | Venkat Mattela, Aravinth Kumar Ayyappannair Radhadevi, Sesha Sairam Regulagadda | 2021-08-31 |
| 11032766 | Wire-free bluetooth communication system with fast pairing | Partha Sarathy Murali | 2021-06-08 |
| 10931301 | Decompression engine for executable microcontroller code | Sriram Mudulodu | 2021-02-23 |
| 10817200 | Memory interface for a secure NOR flash memory | Partha Sarathy Murali, Venkata Siva Prasad Pulagam, Sailaja Dharani Naga Sankabathula, Venkat Rao Gunturu | 2020-10-27 |
| 10757652 | Wireless receiver with field capture for beacon frames | Sriram Mudulodu, Partha Sarathy Murali, Suryanarayana Varma Nallaparaju, Logeshwaran Vijayan, Venkat Mattela | 2020-08-25 |
| 10742429 | Ultra low power mesh network | Partha Sarathy Murali, Ajay Mantha, Nagaraj Reddy Anakala, Venkat Mattela | 2020-08-11 |
| 10541708 | Decompression engine for executable microcontroller code | Sriram Mudulodu | 2020-01-21 |
| 8245063 | Clock selection for a communications processor having a sleep mode | — | 2012-08-14 |
| 8051222 | Concatenating secure digital input output (SDIO) interface | Venkateswarlu Upputuri | 2011-11-01 |
| 8008949 | Clock selection for a communications processor having a sleep mode | — | 2011-08-30 |