Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6683876 | Packet switched router architecture for providing multiple simultaneous communications | James E. Tornes, Steven C. Miller, Jamie Riotto | 2004-01-27 |
| 6513099 | Enhanced graphics cache memory | Jeffery M. Smith | 2003-01-28 |
| 6154794 | Upstream situated apparatus and method within a computer system for controlling data flow to a downstream situated input/output unit | Karim M. Abdalla, Kianoosh Naghshineh, James E. Tornes | 2000-11-28 |
| 5524250 | Central processing unit for processing a plurality of threads using dedicated general purpose registers and masque register for providing access to the registers | Greg Chesson, In Whan CHOI, Yuh-wen Lin, Jeannine Marie Smith, Desmond W. Young | 1996-06-04 |
| 5495596 | Method for clocking functional units in one cycle by using a single clock for routing clock inputs to initiate receive operations prior to transmit operations | — | 1996-02-27 |