Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7088626 | Bias voltage applying circuit and semiconductor memory device | Yasumichi Mori, Takahiko Yoshimoto, Masahiko Watanabe, Shinsuke Anzai, Munetaka Masaki | 2006-08-08 |
| 6930922 | Reading circuit, reference circuit, and semiconductor memory device | Yasumichi Mori, Takahiko Yoshimoto, Shinsuke Anzai | 2005-08-16 |
| 5852570 | Semiconductor memory using select transistors coupled to sub-bitlines from different blocks | Yasuhiro Hotta, Koji Komatsu | 1998-12-22 |