Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5227324 | Gate array and manufacturing method of semiconductor memory device using the same | Kazuya Fujimoto, Yuichi Satoh | 1993-07-13 |
| 5166551 | High speed output circuit without fluctuation for semiconductor integrated circuits | — | 1992-11-24 |
| 5109334 | Memory management unit capable of expanding the offset part of the physical address | — | 1992-04-28 |
| 4988901 | Pulse detecting device for detecting and outputting a pulse signal related to the slower frequency input pulse | Yoshiaki Shibuya, Hiroyuki Ozu | 1991-01-29 |
| 4952824 | Ion implantation programmable logic device | — | 1990-08-28 |
| 4894705 | Semiconductor device | — | 1990-01-16 |
| 4775990 | Serial-to-parallel converter | Akira Yamaguchi | 1988-10-04 |
| 4740714 | Enhancement-depletion CMOS circuit with fixed output | Yoshifumi Masaki | 1988-04-26 |
| 4709168 | Reference voltage generating circuit for enhancement/depletion MOSFET load circuit for driving logic circuits | Mikiro Okada | 1987-11-24 |
| 4694393 | Peripheral unit for a microprocessor system | Takaaki Hirano, Akira Yamaguchi, Junichi Tanimoto, Mikiro Okada | 1987-09-15 |
| 4672647 | Serial data transfer circuits for delayed output | Akira Yamaguchi, Jitsuo Sakamoto | 1987-06-09 |
| 4651031 | Address decoder circuit | — | 1987-03-17 |
| 4630295 | Low power consumption CMOS shift register | Takaaki Hirano, Mikiro Okada | 1986-12-16 |
| 4536859 | Cross-coupled inverters static random access memory | — | 1985-08-20 |
| 4482822 | Semiconductor chip selection circuit having programmable level control circuitry using enhancement/depletion-mode MOS devices | Yoshifumi Masaki | 1984-11-13 |
| 4453236 | Memory array addressing circuitry | Munehiro Uratani | 1984-06-05 |
| 4404654 | Semiconductor device system | Yoshifumi Masaki | 1983-09-13 |
| 4309629 | MOS Transistor decoder circuit | — | 1982-01-05 |