Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5345417 | EPROM device with metallic source connections and fabrication thereof | — | 1994-09-06 |
| 5332470 | Process for manufacturing calibration structures particularly for the calibration of machines for measuring alignment in integrated circuits in general | — | 1994-07-26 |
| 5279982 | Method for fabricating memory cell matrix having parallel source and drain interconnection metal lines formed on the substrate and topped by orthogonally oriented gate interconnection parallel metal lines | — | 1994-01-18 |
| 5227014 | Tapering of holes through dielectric layers for forming contacts in integrated devices | Nadia Iazzi | 1993-07-13 |
| 5210046 | Method of fabricating EPROM device with metallic source connections | — | 1993-05-11 |
| 5068202 | Process for excavating trenches with a rounded bottom in a silicon substrate for making trench isolation structures | Nadia Iazzi | 1991-11-26 |
| 4966867 | Process for forming self-aligned, metal-semiconductor contacts in integrated MISFET structures | Nadia Iazzi | 1990-10-30 |
| 4957881 | Formation of self-aligned contacts | — | 1990-09-18 |