Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12255595 | Calibration method, corresponding circuit and apparatus | Marco Sautto, Valerio Lo Muzzo, Kaufik Linggajaya | 2025-03-18 |
| 10483213 | Die identification by optically reading selectively blowable fuse elements | Agostino Mirabelli, Lorenzo Papillo | 2019-11-19 |
| 6154163 | Successive approximation shift register with reduced latency | Annamaria Rossi, Marcello Leone, Maurizio Nessi | 2000-11-28 |
| 6069513 | Toggle flip-flop network with a reduced integration area | Annamaria Rossi, Marcello Leone, Maurizio Nessi | 2000-05-30 |
| 5943000 | Compensated MOS string and DAC employing such a potentiometric string | Maurizio Nessi, Rinaldo Castello, Marcello Leone, Annamaria Rossi | 1999-08-24 |
| 5886484 | "Masking of switching noise in controlling a ""H"" bridge" | Maurizio Nessi | 1999-03-23 |
| 5859608 | Successive approximation and shift register without redundancy | Lorenzo Papillo, Andrea Pasquino, Annamaria Rossi, Alberto Gola | 1999-01-12 |
| 5808477 | Circuit for detection and protection against short circuits for digital outputs | Alberto Gola, Marcello Leone, Patrizia Milazzo | 1998-09-15 |
| 5789957 | D flip-flop having asynchronous data loading | Lorenzo Papillo, Andrea Pasquino, Annamaria Rossi, Alberto Gola | 1998-08-04 |
| 5625309 | Bistable sequential logic network that is sensitive to the edges of input signals | Aldo Novelli | 1997-04-29 |
| 5528184 | Power-on reset circuit having a low static power consumption | Alberto Gola | 1996-06-18 |
| 5526390 | Decoded counter with error check and self-correction | — | 1996-06-11 |
| 5469096 | Power-transistor slew-rate controller employing only a single capacitor per half-bridge | Maurizio Nessi | 1995-11-21 |
| 5422923 | Programmable time-interval generator | Maurizio Nessi | 1995-06-06 |