Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6768649 | Method and a circuit system for using equivalent integrated-circuit devices operating at different voltages | — | 2004-07-27 |
| 6681193 | Method for testing a CMOS integrated circuit | — | 2004-01-20 |
| 6489800 | Method of testing an integrated circuit | — | 2002-12-03 |
| 5763907 | Library of standard cells for the design of integrated circuits | Pierangelo Confalonieri | 1998-06-09 |
| 5606625 | Digital circuit to regulate the gain of an amplifier stage | Carlo Crippa, Pierangelo Confalonieri | 1997-02-25 |
| 5311073 | High voltage CMOS circuit with NAND configured logic gates and a reduced number of N-MOS transistors requiring drain extension | — | 1994-05-10 |
| 4871927 | Latch-up prevention in a two-power-supply CMOS integrated circuit by means of a single integrated MOS transistor | — | 1989-10-03 |
| 4752704 | Noise suppression interface circuit for non-superimposed two-phase timing signal generator | Giorgio Baccarani | 1988-06-21 |