KJ

Koh Johguchi

SC Semiconductor Technology Academic Research Center: 3 patents #25 of 254Top 10%
TT The University Of Tokyo: 1 patents #1,000 of 2,633Top 40%
Overall (All Time): #1,185,442 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
9977733 Memory controller, data storage device and memory control method using data utilization ratio Ken Takeuchi, Kousuke Miyaji, Hiroki Fujii 2018-05-22
7694077 Multi-port integrated cache Tetsuo Hironaka, Hans Jurgen Mattausch, Tetsushi Koide, Tai Hirakawa 2010-04-06
7360024 Multi-port integrated cache Tetsuo Hironaka, Hans Jurgen Mattausch, Tetsushi Koide, Tai Hirakawa 2008-04-15
7117291 Memory with synchronous bank architecture Hans Jurgen Mattausch, Tetsushi Koide, Tetsuo Hironaka, Hiroshi Uchida, Zhaomin Zhu 2006-10-03