Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373345 | Intelligent management of ferroelectric memory in a data storage device | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2025-07-29 |
| 12282681 | Balancing power, endurance and latency in a ferroelectric memory | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2025-04-22 |
| 12125513 | System on chip (SOC) with processor and integrated ferroelectric memory | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2024-10-22 |
| 12112821 | Read destructive memory wear leveling system | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2024-10-08 |
| 11996144 | Non-volatile memory cell with multiple ferroelectric memory elements (FMEs) | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2024-05-28 |
| 11922055 | Stack register having different ferroelectric memory element constructions | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2024-03-05 |
| 11908504 | Front end buffer having ferroelectric field effect transistor (FeFET) based memory | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2024-02-20 |
| 11899590 | Intelligent cache with read destructive memory cells | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2024-02-13 |
| 11868621 | Data storage with multi-level read destructive memory | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2024-01-09 |
| 11853213 | Intelligent management of ferroelectric memory in a data storage device | Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal +2 more | 2023-12-26 |
| 11513879 | Detection and mitigation for solid-state storage device read failures due to weak erase | Antoine Khoueir | 2022-11-29 |
| 11347403 | Extending the life of a solid state drive by using MLC flash blocks in SLC mode | Antoine Khoueir | 2022-05-31 |
| 11340979 | Mitigation of solid state memory read failures with a testing procedure | Mehmet Emin Aklik, Antoine Khoueir, Nicholas Odin Lien | 2022-05-24 |
| 11175980 | Mitigation of solid state memory read failures | Mehmet Emin Aklik, Antoine Khoueir, Nicholas Odin Lien | 2021-11-16 |
| 11086717 | Random selection of code words for read voltage calibration | Mehmet Emin Aklik, Antoine Khoueir, Ara Patapoutian, Colin Kenneth Hill, Kurt W. Getreuer | 2021-08-10 |
| 11080129 | Mitigation of solid state memory read failures with peer based thresholds | Mehmet Emin Aklik, Antoine Khoueir, Nicholas Odin Lien | 2021-08-03 |
| 11017850 | Master set of read voltages for a non-volatile memory (NVM) to mitigate cross-temperature effects | Kurt W. Getreuer, Antoine Khoueir, Christopher Joseph Curl | 2021-05-25 |
| 11017864 | Preemptive mitigation of cross-temperature effects in a non-volatile memory (NVM) | Kurt W. Getreuer, Antoine Khoueir, Christopher Joseph Curl | 2021-05-25 |
| 10956064 | Adjusting code rates to mitigate cross-temperature effects in a non-volatile memory (NVM) | Kurt W. Getreuer, Antoine Khoueir, Christopher Joseph Curl | 2021-03-23 |
| 10453547 | Monitoring a memory for retirement | Antoine Khoueir, Ara Patapoutian | 2019-10-22 |