Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10613871 | Computing system and method employing processing of operation corresponding to offloading instructions from host processor by memory's internal processor | — | 2020-04-07 |
| 10296315 | Multiple-thread processing methods and apparatuses | Minkyu JEONG, Haewoo PARK, Minyoung SON, Choonki JANG, Donghoon YOO | 2019-05-21 |
| 9891692 | Apparatus and method of controlling power consumption of graphic processing unit (GPU) resources | Choonki JANG, Haewoo PARK, Hyeongseok Yu, Donghoon YOO | 2018-02-13 |
| 9734058 | Optimizing configuration memory by sequentially mapping the generated configuration data by determining regular encoding is possible and functional units are the same in adjacent cycles | Tai-Song Jin, Donghoon YOO | 2017-08-15 |
| 9727460 | Selecting a memory mapping scheme by determining a number of functional units activated in each cycle of a loop based on analyzing parallelism of a loop | Tai-Song Jin, Donghoon YOO | 2017-08-08 |
| 9720497 | Method and apparatus for controlling rendering quality | Choonki JANG, Haewoo PARK | 2017-08-01 |
| 9715746 | Curve rendering method and apparatus | Jeongjoon Yoo, Seokyoon Jung, Soojung Ryu, Donghoon YOO | 2017-07-25 |
| 9697119 | Optimizing configuration memory by sequentially mapping the generated configuration data into fields having different sizes by determining regular encoding is not possible | Tai-Song Jin, Donghoon YOO | 2017-07-04 |
| 9535833 | Reconfigurable processor and method for optimizing configuration memory | Tai-Song Jin, Donghoon YOO | 2017-01-03 |
| 9311270 | Scheduler and scheduling method for reconfigurable architecture | Won-Sub Kim, Hae-Woo Park | 2016-04-12 |
| 8875108 | Run-time bottleneck detection | Cheng-Hong Li | 2014-10-28 |