Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9717041 | Method for discovering radio access technology by mobile communication terminal and wireless access system therefor | Sung-hyun Chung | 2017-07-25 |
| 9717052 | Method for receiving radio packet through short-range wireless communication, portable terminal, and short-range wireless communication system | Sung-hyun Chung | 2017-07-25 |
| 9408023 | Short-range wireless communication access device, portable terminal for discovering short-range wireless communication access device, and short-range wireless communication system | Sung-hyun Chung | 2016-08-02 |
| 7797617 | Interleaving method in OFDM system | Jeong-sang Lee, Sung-hyun Chung, Jae-Min Ahn | 2010-09-14 |
| 7680870 | FFT apparatus for high data rate and method thereof | Jeong-sang Lee, Sung-hyun Chung, Jae-Min Ahn | 2010-03-16 |
| 7304468 | Method and apparatus for detecting minute oscillation and WiBro repeater having the same | Sung-hyun Chung, Hyun-uk Shin | 2007-12-04 |
| 7158557 | Channel estimation apparatus and method | Young-yong Lee, Kwang-Seog Bae, Jae-Min Ahn, Hyung Jin CHOI | 2007-01-02 |
| 6202143 | System for fetching unit instructions and multi instructions from memories of different bit widths and converting unit instructions to multi instructions by adding NOP instructions | — | 2001-03-13 |
| 6052768 | Circuit and method for modulo address generation with reduced circuit area | — | 2000-04-18 |
| 5920497 | Method and apparatus for performing a double precision operation using a single instruction type | — | 1999-07-06 |
| 5907498 | Circuit and method for overflow detection in a digital signal processor having a barrel shifter and arithmetic logic unit connected in series | — | 1999-05-25 |
| 5905665 | Modulo address generating circuit and method with reduced area and delay using low speed adders | — | 1999-05-18 |
| 5712880 | Traceback-performing apparatus in viterbi decoder | Young-Uk Oh | 1998-01-27 |