Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8166238 | Method, device, and system for preventing refresh starvation in shared memory bank | Dong-Hyuk Lee, Yong-Jun Kim, Jong-Wook Park, Chi-Sung Oh | 2012-04-24 |
| 8122199 | Multi port memory device with shared memory area using latch type memory cells and driving method | Jin-Hyoung Kwon, Han-Gu Sohn, Ho-Cheol Lee, Kwang-Myeong JANG | 2012-02-21 |
| 8019948 | Multi-path accessible semiconductor memory device having mailbox areas and mailbox access control method thereof | Chi-Sung Oh, Yong-Jun Kim, Jin Kuk Kim, Soo-Young Kim | 2011-09-13 |
| 7840762 | Multi-path accessible semiconductor memory device having mailbox areas and mailbox access control method thereof | Chi-Sung Oh, Yong-Jun Kim, Jin Kuk Kim, Soo-Young Kim | 2010-11-23 |
| 7573772 | Semiconductor memory device and self-refresh method therefor | Ho-Cheol Lee | 2009-08-11 |
| 7555625 | Multi-memory chip and data transfer method capable of directly transferring data between internal memory devices | — | 2009-06-30 |
| 7440352 | Semiconductor memory device capable of selectively refreshing word lines | — | 2008-10-21 |
| 7385859 | Semiconductor memory devices and methods for generating column enable signals thereof | — | 2008-06-10 |
| 7095670 | Semiconductor memory having variable memory size and method for refreshing the same | You-Mi Lee | 2006-08-22 |
| 7068559 | Word line enable timing determination circuit of a memory device and methods of determining word line enable timing in the memory device | Hyun Suk Lee | 2006-06-27 |
| 6928016 | Refresh type semiconductor memory device having refresh circuit for minimizing refresh fail at high speed operation | Song-Won Kim | 2005-08-09 |
| 6847572 | Refresh control circuit and methods of operation and control of the refresh control circuit | Hyun Suk Lee | 2005-01-25 |
| 6633995 | System for generating N pipeline control signals by delaying at least one control signal corresponding to a subsequent data path circuit | — | 2003-10-14 |
| 6542425 | Refresh control circuit for controlling refresh cycles according to values stored in a register and related refreshing method | — | 2003-04-01 |
| 6108244 | Synchronous memory devices having dual port capability for graphics and other applications | Ho-Cheol Lee | 2000-08-22 |