Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12171097 | Semiconductor devices and electronic systems including the same | Kangmin Kim, Seulji Lee, Hyejin LEE | 2024-12-17 |
| 12004353 | Semiconductor devices including a contact structure that contacts a dummy channel structure | Joo Won Park, Kwang Soo Kim | 2024-06-04 |
| 11765900 | Vertical-type memory device | Joo Won Park | 2023-09-19 |
| 11659713 | Semiconductor devices including a contact structure that contacts a dummy channel structure | Joo Won Park, Kwang Soo Kim | 2023-05-23 |
| 11495495 | Method of manufacturing semiconductor device having a structure pattern having a plurality of trenches | Geun Won Lim, Myung-Keun Lee, Seok Cheon Baek | 2022-11-08 |
| 11145669 | Semiconductor devices including a contact structure that contacts a dummy channel structure | Joo Won Park, Kwang Soo Kim | 2021-10-12 |
| 11094708 | Vertical-type memory device | Joo Won Park | 2021-08-17 |
| 10879196 | Three-dimensional semiconductor memory devices | Sang Jun Hong | 2020-12-29 |
| 10825832 | Semiconductor device including gates | Ji Mo Gu, Hyun-Mog Park, Byoung Il Lee, Tak Hyung Lee, Jun Ho Cha | 2020-11-03 |
| 10818547 | Method of manufacturing semiconductor device having a structure pattern having a plurality of trenches | Geun Won Lim, Myung-Keun Lee, Seok Cheon Baek | 2020-10-27 |
| 10707231 | Semiconductor memory device having vertical supporter penetrating the gate stack structure and through dielectric pattern | Seo-Goo Kang, Kwonsoon Jo, Kohji Kanamori | 2020-07-07 |
| 10553605 | Semiconductor device including gates | Ji Mo Gu, Hyun-Mog Park, Byoung Il Lee, Tak Hyung Lee, Jun Ho Cha | 2020-02-04 |