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Memory device supporting a high-efficient input/output interface and a memory system including the memory device |
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Transmitter circuit and method of operating same |
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Transmitter circuit including selection circuit, and method of operating the selection circuit |
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| 11789879 |
Memory device supporting a high-efficient input/output interface and a memory system including the memory device |
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Probe device, test device, and test method for semiconductor device |
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Transmitters for generating multi-level signals and memory system including the same |
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Memory package and storage device including the same |
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Multi-level signal receivers and memory systems including the same |
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Memory device for generating pulse amplitude modulation-based DQ signal and memory system including the same |
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Multi-mode transmission line and storage device including the same |
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Semiconductor device and memory system |
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Impedance calibration circuit and memory device including the same |
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2022-11-15 |
| 11461251 |
Memory device supporting a high-efficient input/output interface and a memory system including the memory device |
Hyungmin Jin, Younghoon Son, Youngdon Choi, Junghwan Choi |
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Impedance calibration circuit and memory device including the same |
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2021-09-07 |
