Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373362 | Semiconductor device and method of building a pooled memory without using switches | Il-Sang Park, Jinsu Park | 2025-07-29 |
| 10671562 | Clock gating circuit | Lingling Liao, Bub-chul Jeong | 2020-06-02 |
| 10185684 | System interconnect and operating method of system interconnect | Jun Hee Yoo, Bub-chul Jeong, Dongsoo Kang | 2019-01-22 |
| 9886414 | Bus system in SoC | Lingling Liao, Bub-chul Jeong | 2018-02-06 |
| 9152213 | Bus system in SoC and method of gating root clocks therefor | Lingling Liao, Bub-chul Jeong | 2015-10-06 |
| 9021171 | Bus system including a master device, a slave device, an interconnector coupled between the master device and the slave device, and an operating method thereof | Bub-chul Jeong | 2015-04-28 |
| 8819310 | System-on-chip and data arbitration method thereof | Bub-chul Jeong, Junhyung Um, Jung-Sik Lee, Hyun-Joon Kang, Sung Min Hong +1 more | 2014-08-26 |
| 8819322 | System on chip comprising interconnector and control method thereof | Sung Min Hong, Bub-chul Jeong | 2014-08-26 |
| 8667195 | Bus-system including an interconnector, a master device, a slave device, and an operating method thereof | Bub-chul Jeong | 2014-03-04 |
| 8582709 | Bandwidth synchronization circuit and bandwidth synchronization method | Hyunuk Jung, Junhyung Um, Sunghoon Shim, Sung Min Hong, Bub-chul Jeong | 2013-11-12 |
| 8443122 | Asynchronous upsizing circuit in data processing system | Junhyung Um, Woo Cheol Kwon, Hyun-Joon Kang, Bub-chul Jeong | 2013-05-14 |