FL

Feng Lin

RR Round Rock Research: 5 patents #35 of 239Top 15%
MT Mircon Technology: 1 patents #1 of 36Top 3%
Overall (All Time): #223,096 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10128842 Output impedance calibration for signaling — 2018-11-13
8218708 Phase splitter using digital delay locked loops R. Jacob Baker 2012-07-10
8212595 System and method to improve the efficiency of synchronous mirror delays and delay locked loops — 2012-07-03
7982519 Centralizing the lock point of a synchronous circuit — 2011-07-19
7881149 Write latency tracking using a delay lock loop in a synchronous DRAM James B. Johnson, Brent Keeth 2011-02-01
7873131 Phase splitter using digital delay locked loops R. Jacob Baker 2011-01-18
7830194 Centralizing the lock point of a synchronous circuit — 2010-11-09
7593286 Write latency tracking using a delay lock loop in a synchronous DRAM James B. Johnson, Brent Keeth 2009-09-22
7480203 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM James B. Johnson, Brent Keeth 2009-01-20
7355922 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM James B. Johnson, Brent Keeth 2008-04-08
7355920 Write latency tracking using a delay lock loop in a synchronous DRAM James B. Johnson, Brent Keeth 2008-04-08
7336111 Fast-locking digital phase locked loop Brent Keeth 2008-02-26
7332946 Power supply voltage detection circuitry and methods for use of the same Dong Pan, Paul A. Silvestri 2008-02-19
7221201 Fast-locking digital phase locked loop Brent Keeth 2007-05-22
7161391 Skew tolerant high-speed digital phase detector — 2007-01-09
7148742 Power supply voltage detection circuitry and methods for use of the same Dong Pan, Paul A. Silvestri 2006-12-12
7065001 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM James B. Johnson, Brent Keeth 2006-06-20
6839860 Capture clock generator using master and slave delay locked loops — 2005-01-04
6836166 Method and system for delay control in synchronization circuits Brent Keeth, Brian Johnson 2004-12-28
6687185 Method and apparatus for setting and compensating read latency in a high speed DRAM Brent Keeth, Brian Johnson 2004-02-03