Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4587711 | Process for high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines | — | 1986-05-13 |
| 4506437 | Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines | — | 1985-03-26 |
| 4477962 | Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines | — | 1984-10-23 |
| 4455737 | Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines | — | 1984-06-26 |
| 4277881 | Process for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines | — | 1981-07-14 |
| 4221044 | Self-alignment of gate contacts at local or remote sites | Gary L. Heimbigner | 1980-09-09 |
| 4221045 | Self-aligned contacts in an ion implanted VLSI circuit | — | 1980-09-09 |
| 4192059 | Process for and structure of high density VLSI circuits, having inherently self-aligned gates and contacts for FET devices and conducting lines | Mahboob Khan, Gary L. Heimbigner, Noubar A. Aghishian | 1980-03-11 |