Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11860500 | Common database for supervisory control and on-site commissioning of an electrically switchable glass system | Troy Liebl, Sean Kioski | 2024-01-02 |
| 11751129 | Multiple network mode selection devices | Somu Ramiah, Pierre Olivier, Lloyd Wendland, Christopher J. Ludewig, Andrew Morrow | 2023-09-05 |
| 10932186 | Multiple network mode selection devices | Somu Ramiah, Pierre Olivier, Lloyd Wendland, Christopher J. Ludewig, Andrew Morrow | 2021-02-23 |
| 10219205 | Multiple network mode selection devices | Somu Ramiah, Pierre Olivier, Lloyd Wendland, Christopher J. Ludewig, Andrew Morrow | 2019-02-26 |
| 6639898 | Wide area mobile communication networks with multiple routing mode options | Santanu Dutta, Dennis W. Sutherland, Thomas A. Trebs | 2003-10-28 |
| 6361499 | Multiple angle needle guide | John D. Bates, Craig Joseph Cermak, Brett Severence, David F. Schultz | 2002-03-26 |
| 5953319 | Wide area mobile communication networks with multiple routing mode options | Santanu Dutta, Dennis W. Sutherland, Thomas A. Trebs | 1999-09-14 |
| 5237696 | Method and apparatus for self-timed digital data transfer and bus arbitration | — | 1993-08-17 |
| 5140680 | Method and apparatus for self-timed digital data transfer and bus arbitration | — | 1992-08-18 |
| 4995040 | Apparatus for management, comparison, and correction of redundant digital data | Kevin L. McGahee | 1991-02-19 |
| 4441182 | Repetitious logic state signal generation apparatus | Jeffrey D. Russell | 1984-04-03 |
| 4439835 | Apparatus for and method of generation of ripple carry signals in conjunction with logical adding circuitry | Jeffrey D. Russell | 1984-03-27 |
| 4434474 | Single pin time-sharing for serially inputting and outputting data from state machine register apparatus | Jeffrey D. Russell | 1984-02-28 |
| 4433412 | Method and apparatus for testing and verifying the operability of register based state machine apparatus | Jeffrey D. Russell | 1984-02-21 |
| 4424460 | Apparatus and method for providing a logical exclusive OR/exclusive NOR function | — | 1984-01-03 |
| 4417314 | Parallel operating mode arithmetic logic unit apparatus | — | 1983-11-22 |
| 4417316 | Digital binary increment circuit apparatus | — | 1983-11-22 |
| 4390987 | Multiple input master/slave flip flop apparatus | — | 1983-06-28 |
| 4390988 | Efficient means for implementing many-to-one multiplexing logic in CMOS/SOS | Jeffrey D. Russell | 1983-06-28 |