Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7912286 | Image processing apparatus and method of image processing capable of effective labeling | Tomoaki Ozaki | 2011-03-22 |
| 7659908 | Image processing circuit, combined image processing circuit, and image forming apparatus | — | 2010-02-09 |
| 7512290 | Image processing apparatus with SIMD-type microprocessor to perform labeling | Tomoaki Ozaki | 2009-03-31 |
| 7340113 | Image processing apparatus with SIMD-type microprocessor to perform labeling | Tomoaki Ozaki | 2008-03-04 |
| 7191310 | Parallel processor and image processing apparatus adapted for nonlinear processing through selection via processor element numbers | Kazuhiko Hara, Takao Katayama, Kazuhiko Iwanaga, Hiroshi Takafuji | 2007-03-13 |
| 7170522 | Image processing circuit, combined image processing circuit, and image forming apparatus | — | 2007-01-30 |
| 6662295 | Method and system dynamically presenting the branch target address in conditional branch instruction | — | 2003-12-09 |
| 6266756 | Central processing unit compatible with bank register CPU | Kazuhiko Hara, Keiichi Yoshioka, Keiji Nakamura, Takao Katayama | 2001-07-24 |
| 6189086 | Data processing apparatus | — | 2001-02-13 |
| 6175890 | Device for efficiently handling interrupt request processes | — | 2001-01-16 |
| 5938758 | Microprocessor having function of prefetching instruction | Takao Katayama, Keiichi Yoshioka, Kazuhiko Hara | 1999-08-17 |
| 5696957 | Integrated circuit comprising a central processing unit for executing a plurality of programs | Kazuhiko Hara, Keiichi Yoshioka, Takashi Yasui | 1997-12-09 |
| 5630158 | Central processing unit including inhibited branch area | Kazuhiko Hara, Keiichi Yoshioka, Takao Katayama | 1997-05-13 |
| 5606709 | Register group circuit for data processing system | Keiichi Yoshioka, Kazuhiko Hara, Takao Katayama | 1997-02-25 |
| 5596761 | Central processing unit with internal register initializing means | Keiichi Yoshioka, Takashi Yasui | 1997-01-21 |
| 5594890 | Emulation system for emulating CPU core, CPU core with provision for emulation and ASIC having the CPU core | Keiichi Yoshioka, Kazuhiko Hara, Takao Katayama | 1997-01-14 |
| 5511173 | Programmable logic array and data processing unit using the same | Takashi Yasui, Keiichi Yoshioka | 1996-04-23 |
| 5301338 | System including central processing unit | Takashi Yasui, Keiichi Yoshioka | 1994-04-05 |
| 5161229 | Central processing unit | Takashi Yasui, Keiichi Yoshioka | 1992-11-03 |