Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11959956 | Circuit check method and electronic apparatus | Yun Jing Lin, Meng-Jung Lee, Yu-Lan Lo | 2024-04-16 |
| 11455449 | Method for determining IC voltage and method for finding relation between voltages and circuit parameters | Ying Chen, Mei Yu, Yu-Lan Lo, Hsin-Chang Lin | 2022-09-27 |
| 11416665 | Power rail design method, apparatus and non-transitory computer readable medium thereof | Cheng-Chen Huang, Yun WU, Hsin-Chang Lin, Chih-Chan Chen, Chia-Jung Hsu +1 more | 2022-08-16 |
| 11314912 | IC design data base generating method, IC design method, and electronic device using the methods | Szu-Ying Huang, Mei Yu, Yu-Lan Lo | 2022-04-26 |
| 11194945 | Clock deadlock detecting system, method, and non-transitory computer readable storage medium | I-Hsiu Lo, Yung-Jen Chen, Yu-Lan Lo | 2021-12-07 |
| 11010521 | Method of detecting relations between pins of circuit and computer program product thereof | CHIA-LING HSU, Ting-Hsiung Wang, Meng-Jung Lee, Yu-Lan Lo | 2021-05-18 |
| 10997353 | Integrated circuit design method and non-transitory computer readable medium thereof | I-Ching Tsai, Li-Yi Lin, Yun-Chih Chang | 2021-05-04 |
| 10936784 | Planning method for power metal lines | Hsin-Wei Pan, Li-Yi Lin, Yun-Chih Chang | 2021-03-02 |
| 10909290 | Method of detecting a circuit malfunction and related device | I-Hsiu Lo, Yung-Jen Chen, Yu-Lan Lo | 2021-02-02 |
| 10860758 | Method of using simulation software to generate circuit layout | Chien-Cheng Liu, Shih-Chih Liu, Yun-Chih Chang | 2020-12-08 |
| 10783293 | Circuit design system, checking method, and non-transitory computer readable medium thereof | Yu-Lan Lo, Meng-Jung Lee, Yun Jing Lin | 2020-09-22 |
| 10778214 | Circuit structure and power-on method thereof | Chien-Cheng Liu, Yun WU, Yun-Chih Chang | 2020-09-15 |
| 10657303 | Circuit encoding method and circuit structure recognition method | Yun Jing Lin, Meng-Jung Lee, Yu-Lan Lo, Chien-Nan Liu, Yu-Kang Lou +1 more | 2020-05-19 |
| 10521529 | Simulation method for mixed-signal circuit system and related electronic device | Ying Chen, Mei Yu, Ting-Hsiung Wang, Yu-Lan Lo | 2019-12-31 |
| 9858382 | Computer program product for timing analysis of integrated circuit | Ying Chen, Mei Yu, Ting-Hsiung Wang, Yu-Lan Lo | 2018-01-02 |
| 9003341 | Method for determining interface timing of integrated circuit automatically and related machine readable medium thereof | Mei Yu, Ting-Hsiung Wang, Yu-Lan Lo | 2015-04-07 |
| 8726206 | Deadlock detection method and related machine readable medium | Ting-Hsiung Wang, Yu-Lan Lo | 2014-05-13 |
| 8713497 | Method of generating integrated circuit model | Meng-Jung Lee, Ting-Hsiung Wang, Yu-Lan Lo | 2014-04-29 |
| 8443320 | Extracting methods for circuit models | Meng-Jung Lee, Yu-Lan Lo | 2013-05-14 |