Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12402375 | Asymmetric vertical nanowire MOSFET having asymmetric nanowire geometry near metal gate and method of fabricating thereof | Olli-Pekka Kilpi | 2025-08-26 |
| 11621346 | Vertical metal oxide semiconductor field effect transistor (MOSFET) and a method of forming the same | Olli-Pekka Kilpi | 2023-04-04 |
| 10361284 | Method for vertical gate-last process | Johannes Svensson, Martin Berg, Karl-Magnus Persson, Erik Lind | 2019-07-23 |
| 10090292 | Radial nanowire Esaki diode devices and methods | Erik Lind, Jonas Ohlsson, Lars Samuelson, Mikeal Bjork, Claes Thelander +1 more | 2018-10-02 |
| 9608567 | Transceiver module | Mikael Egard, Mats Ärlelid | 2017-03-28 |
| 9117753 | Process for manufacturing a semiconductor device and an intermediate product for the manufacture of a semiconductor device | Mikael Egard, Erik Lind | 2015-08-25 |
| 9087896 | Method of producing precision vertical and horizontal layers in a vertical semiconductor structure | Jonas Ohlsson, Lars Samuelson, Erik Lind, Truls Lowgren | 2015-07-21 |
| 8890117 | Nanowire circuit architecture | — | 2014-11-18 |
| 8551834 | Method of producing precision vertical and horizontal layers in a vertical semiconductor structure | Jonas Ohlsson, Lars Samuelson, Erik Lind, Truls Lowgren | 2013-10-08 |
| 8344361 | Semiconductor nanowire vertical device architecture | Tomas Bryllert, Erik Lind, Lars Samuelson | 2013-01-01 |
| 8330143 | Semiconductor nanowire transistor | Tomas Bryllert, Erik Lind, Lars Samuelson | 2012-12-11 |
| 8178403 | Method of producing precision vertical and horizontal layers in a vertical semiconductor structure | Jonas Ohlsson, Lars Samuelson, Erik Lind, Truls Lowgren | 2012-05-15 |
| 8063450 | Assembly of nanoscaled field effect transistors | Erik Lind, Tomas Bryllert, Jonas Ohlsson, Truls Lowgren, Lars Samuelson +1 more | 2011-11-22 |